sim:/processortb/A1Res_buff_mem \
sim:/processortb/A2Res_buff_mem \
sim:/processortb/IR1_buffered \
sim:/processortb/IR1_short \
sim:/processortb/IR2_buffered \
sim:/processortb/IR2_short \
sim:/processortb/RS1_buff_ex \
sim:/processortb/RS2_buff_ex \
sim:/processortb/RT1_buff_ex \
sim:/processortb/RT1_buff_mem \
sim:/processortb/RT2_buff_ex \
sim:/processortb/RT2_buff_mem \
sim:/processortb/branch \
sim:/processortb/branch_address \
sim:/processortb/carry_flag \
sim:/processortb/clk \
sim:/processortb/cw_1_buff_ex \
sim:/processortb/cw_1_buff_mem \
sim:/processortb/cw_2_buff_ex \
sim:/processortb/cw_2_buff_mem \
sim:/processortb/data_into_mem \
sim:/processortb/data_outof_mem \
sim:/processortb/inport_data \
sim:/processortb/interrupt \
sim:/processortb/mem_address \
sim:/processortb/negative_flag \
sim:/processortb/new_pc_buff_dec \
sim:/processortb/new_pc_buff_ex \
sim:/processortb/new_pc_buff_mem \
sim:/processortb/outport_data \
sim:/processortb/period \
sim:/processortb/push_addr_1_buff_ex \
sim:/processortb/push_addr_1_buff_mem \
sim:/processortb/push_addr_2_buff_ex \
sim:/processortb/push_addr_2_buff_mem \
sim:/processortb/read_mem \
sim:/processortb/reset \
sim:/processortb/write_double_mem \
sim:/processortb/write_mem \
sim:/processortb/zero_flag
